Back ARM Cortex-A9 Catalan ARM Cortex-A9 MPCore Czech ARM Cortex-A9 German Cortex-A9 Esperanto آرم کورتکس-ای۹ Persian ARM Cortex-A9 MPCore French ARM Cortex-A9 Hungarian ARM Cortex-A9 MPCore Italian ആം കോർടെക്സ്-എ 9 Malayalam ARM Cortex-A9 NB
 MediaTek M6575 | |
| General information | |
|---|---|
| Launched | 2007 |
| Designed by | ARM Holdings |
| Performance | |
| Max. CPU clock rate | 0.8 GHz to 2 GHz |
| Cache | |
| L1 cache | 32 KB I, 32 KB D |
| L2 cache | 128 KB–8 MB (configurable with L2sr1 cache controller) |
| Architecture and classification | |
| Instruction set | ARMv7-A |
| Physical specifications | |
| Cores |
|
| History | |
| Predecessor | ARM Cortex-A8 |
| Successor | ARM Cortex-A12 |
The ARM Cortex-A9 MPCore is a 32-bit multi-core processor that provides up to 4 cache-coherent cores, each implementing the ARM v7 architecture instruction set.[1] It was introduced in 2007.[2]
- ^ "ARM Cortex-A9 MPCore". Arm.com. Retrieved 2 February 2012.
- ^ Cite error: The named reference
spinswas invoked but never defined (see the help page).