Back P6 (microarquitectura) Catalan P6 (mikroarchitektura) Czech Intel P6 German Μικροαρχιτεκτονική P6 Greek Intel P6 Finnish Intel P6 French P6 (mikroarchitektúra) Hungarian Intel P6 Italian P6マイクロアーキテクチャ Japanese P6 (마이크로아키텍처) Korean
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| General information | |
|---|---|
| Launched | November 1, 1995 |
| Performance | |
| Max. CPU clock rate | 150[1] MHz to 1.40 GHz |
| FSB speeds | 66 MHz to 133 MHz |
| Cache | |
| L1 cache | Pentium Pro: 16 KB (8 KB I cache + 8 KB D cache) Pentium II/III: 32 KB (16 KB I cache + 16 KB D cache) |
| L2 cache | 128 KB to 512 KB 256 KB to 2048 KB (Xeon) |
| Architecture and classification | |
| Microarchitecture | P6 |
| Instruction set | x86-16, IA-32 |
| Extensions | |
| Physical specifications | |
| Transistors | |
| Cores |
|
| Socket(s) | |
| Products, models, variants | |
| Model(s) |
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| Variant(s) |
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| History | |
| Predecessor(s) | P5 |
| Successor(s) | NetBurst, Pentium M |
| Support status | |
| Unsupported | |
The P6 microarchitecture is the sixth-generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is frequently referred to as i686.[2] It was planned to be succeeded by the NetBurst microarchitecture used by the Pentium 4 in 2000, but was revived for the Pentium M line of microprocessors. The successor to the Pentium M variant of the P6 microarchitecture is the Core microarchitecture which in turn is also derived from P6.
P6 was used within Intel's mainstream offerings from the Pentium Pro to Pentium III, and was widely known for low power consumption, excellent integer performance, and relatively high instructions per cycle (IPC).
- ^ "Pentium® Pro Processor at 150 MHz, 166 MHz, 180 MHz and 200 MHz" (PDF). Intel Corporation. November 1995. p. 1. Archived from the original (PDF) on April 12, 2016.
- ^ Hutchings, Ben (September 28, 2015). "Defaulting to i686 for the Debian i386 architecture". debian-devel (Mailing list).