Channel I/O

In computing, channel I/O is a high-performance input/output (I/O) architecture that is implemented in various forms on a number of computer architectures, especially on mainframe computers. In the past, channels were generally^[a] implemented with custom devices, variously named channel, I/O processor, I/O controller, I/O synchronizer, or DMA controller.

^ "IBM 3705 Communications Controller" (PDF). Datapro Reports on Data Communications. McGraw-Hili. April 1990 [May 1987]. Retrieved April 3, 2022. Cycle-stealing is a form of interrupt in which the component needing access to memory or to the processor takes control for an entire machine cycle.

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[1] "IBM 3705 Communications Controller" (PDF). Datapro Reports on Data Communications. McGraw-Hili. April 1990 [May 1987]. Retrieved April 3, 2022. Cycle-stealing is a form of interrupt in which the component needing access to memory or to the processor takes control for an entire machine cycle.

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Channel I/O

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