Memory access pattern

In computing, a memory access pattern or IO access pattern is the pattern with which a system or program reads and writes memory on secondary storage. These patterns differ in the level of locality of reference and drastically affect cache performance,[1] and also have implications for the approach to parallelism[2][3] and distribution of workload in shared memory systems.[4] Further, cache coherency issues can affect multiprocessor performance,[5] which means that certain memory access patterns place a ceiling on parallelism (which manycore approaches seek to break).[6]

Computer memory is usually described as "random access", but traversals by software will still exhibit patterns that can be exploited for efficiency. Various tools exist to help system designers[7] and programmers understand, analyse and improve the memory access pattern, including VTune and Vectorization Advisor,[8][9][10][11][12] including tools to address GPU memory access patterns[13]

Memory access patterns also have implications for security,[14][15] which motivates some to try and disguise a program's activity for privacy reasons.[16][17]

  1. ^ "data oriented design" (PDF).
  2. ^ Jang, Byunghyun; Schaa, Dana; Mistry, Perhaad & Kaeli, David (2010-05-27). "Exploiting Memory Access Patterns to Improve Memory Performance in Data-Parallel Architectures". IEEE Transactions on Parallel and Distributed Systems. 22 (1). New York: IEEE: 105–118. doi:10.1109/TPDS.2010.107. eISSN 1558-2183. ISSN 1045-9219. S2CID 15997131. NLM unique id 101212014.
  3. ^ Jeffers, James; Reinders, James; Sodani, Avinash (2016-05-31). xeon phi optimization. ISBN 9780128091951.
  4. ^ "Analysis of Energy and Performance of Code Transformations for PGAS-based Data Access Patterns" (PDF).
  5. ^ "enhancing cache coherent architectures with memory access patterns for embedded many-core systems" (PDF).
  6. ^ "intel terascale" (PDF).
  7. ^ analysis of memory access patterns. WWC '98. 29 November 1998. p. 105. ISBN 9780769504506.
  8. ^ "QUAD a memory access pattern analyser" (PDF).
  9. ^ "Dymaxion: Optimizing Memory Access Patterns for Heterogeneous Systems" (PDF).
  10. ^ "evaluation of a memory access classification scheme for pointer intensive and numeric programs". 1996. CiteSeerX 10.1.1.48.4163. {{cite journal}}: Cite journal requires |journal= (help)
  11. ^ Matsubara, Yuki; Sato, Yukinori (2014). "Online Memory Access Pattern Analysis on an Application Profiling Tool". 2014 Second International Symposium on Computing and Networking. pp. 602–604. doi:10.1109/CANDAR.2014.86. ISBN 978-1-4799-4152-0. S2CID 16476418.
  12. ^ "Putting Your Data and Code in Order: Data and layout".
  13. ^ CuMAPz: a tool to analyze memory access patterns in CUDA. Dac '11. 5 June 2011. pp. 128–133. doi:10.1145/2024724.2024754. ISBN 9781450306362. S2CID 16065152.
  14. ^ "Memory Access Pattern Protection for Resource-constrained Devices" (PDF).
  15. ^ "understanding cache attacks" (PDF).
  16. ^ "protecting data in the cloud".
  17. ^ "boosting-cloud-security-with----oblivious-ram". 24 September 2013.proposed RAM design avoiding memory-access-pattern vulnerabilities

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